The present invention relates to error correction, and more particularly, to a method for rapidly correcting an error and a device for performing the method.
The operation of a decoder for correcting an error in an optical disk data reproducing system such as a compact disk-read only memory (CD-ROM) or digital versatile disk-ROM (DVD-ROM) system, and other systems requiring error correction will be described. Here, a decoder for a CD-ROM system is given as an example.
The CD-ROM decoder is largely divided into a data input portion, a data error correcting portion, and a data transmitting portion.
The data input portion receives data from a digital signal processor (DSP) for a compact disk player, descrambles the data, and temporarily stores the descrambled data in a buffer memory.
The data error correcting portion reads the data stored in the buffer memory, decodes Q and P code words encoded in the REED-SOLOMON code, and corrects a possibly produced error.
The data transmitting portion receives the error-corrected data and transmits the data to a host computer (not shown).
The structure and operation of a conventional error correcting method and device will be described with reference to the attached drawings.
FIG. 1 is a flowchart for explaining the conventional error correcting method performed in a CD-ROM decoder. The conventional error correcting method is performed by correcting an error in a lower byte of data constituted in word units in steps 10 and 12, and correcting an error in an upper byte of the word-unit data in steps 14 and 16.
FIG. 2 illustrates a data format of a sector. Reference character L-CH denotes the data in a left channel, reference character R-CH denotes the data in a right channel, reference character L denotes a least significant bit (LSB), and reference character M denotes a most significant bit (MSB). Three upper rows 20 represent a synchronization pattern indicating one block, and the next 585 rows 22 represent data patterns. Here, one sector has 2352 bytes or 1176 words.
For example, the first data word `0000` following the synchronization pattern 20 of one block includes its lower byte `0000L` and upper byte `0000M`.
FIG. 3 is an LSB map or LSB plane having only lower bytes selected from the data of one sector shown in FIG. 2. Upper 24 rows 30 represent a header excluding a synchronization pattern, and user data, and the next two rows 32 represent P parity bits. Reference numeral 34 denotes Q parity bits.
An MSB plane takes the same form as that of the LSB plane shown in FIG. 3.
In the conventional error correcting method performed in a CD-ROM decoder, Q code words in the LSB of FIG. 3 are decoded in step 10, since data input to the CD-ROM decoder is encoded in the REED-SOLOMON code in a CD-ROM encoder. In step 12, P code words in the LSB plane are decoded in step 12. Q code words and P code words of the MSB plane are decoded in steps 14 and 16, respectively.
FIG. 4 is a block diagram of a conventional CD-ROM decoder. The conventional CD-ROM decoder has a DRAM 50, a data storing portion 80, an address generating portion 90, and a data error correcting portion 60 including an 8-bit latch 62 an 8-bit buffer 64, and a main error correcting unit 70 which has a syndrome calculator 72, an error calculator 74, and an error corrector 76.
The DRAM 50 of FIG. 4 receives the sector data of FIG. 2 transmitted from a CD-ROM digital signal processor (not shown) and temporarily stores the data.
The data error correcting portion 60 is a conventional error correcting device for performing the method shown in FIG. 1. The 8-bit latch 62 outputs previously latched data to the syndrome calculator 72 simultaneously with latching the data buffered in the DRAM 50 in response to a selection signal C1. The syndrome calculator 72 of the main error correcting unit 70 receives the data from the 8-bit latch 62 in response to a control signal C2 and calculates syndromes SO and SI using the received data. The error calculator 74 receives the syndromes calculated in the syndrome calculator 72 and calculates the location and value of an error.
The error calculator 74 performs a procedure for impossible error correction, if more than two errors are found or an error is located beyond a code range. However, if one error is generated and the error is located in the code range, the error calculator 74 outputs the error location to the address generating portion 90. The address generating portion 90 generates an address ADD corresponding to the received error location to the DRAM 50. The DRAM 50 reads data having the error, which is stored in the address ADD received from the address generating portion 90, and outputs the data to the 8-bit latch 62. The 8-bit latch 62 latches the data having the error and output from the DRAM 50 and outputs the latched data to the error corrector 76.
The error corrector 76 receives the data having the error and output from the 8-bit latch 62 and an error value from the error calculator 74, corrects the error in response to a control signal C3, and outputs the error-corrected data to the 8-bit buffer 64. The data storing portion 80 stores the error-corrected data received from the 8-bit buffer 64 according to a control signal C4.
If a CD-ROM system operates at a low multiple speed like 1.times. or 2.times. speed, data is slowly read from a disk, thereby generating no problem in transmitting data to a host computer. On the other hand, in a CD-ROM system operated at an 8.times. or above speed, buffering, error-correcting, and transmitting rapidly input data are simultaneously performed. Here, the data buffering and error correction are performed in byte units, whereas the data transmission is performed in word units, that is, two-byte units, thus placing constraints on transmission of data to a host computer.
In other words, the conventional CD-ROM decoder of FIG. 4 employs the following pipe line method which simultaneously performs the above three operations. That is, while the data of an Nth sector received from the digital signal processor for a compact disk player is stored in an external buffer RAM, the data error correcting portion corrects an error in the data of an N-1th sector and the data transmitting portion transmits the data of an N-2th sector whose error was corrected to a host computer. Here, since time for storing the data of one sector in the external buffer RAM and time for correcting an error are predetermined, the data transmission to the host computer is performed for the rest time of time for processing the data of one sector in the decoder except for time required for buffering and error correction.
Consequently, the CD-ROM system of a low multiple speed generates no problem with data transmission to the host computer due to a slow transmission rate of data input to the decoder, while the CD-ROM system of a high multiple speed, namely, 8.times. or above speed may produce a problem with a transmission rate.